仕事概要
| 職種 | 技術職（販売、設計、開発、生産管理）／開発、研究、実験、プロジェクトマネージャー |
|---|---|
| 業種 | その他／ |
| 雇用形態 | 未分類 |
| ポジションレベル | その他 |
| 募集人数 | 1名 |
| 希望入社時期 | - |
| 必須語学力 |
英語 （日常会話レベル） |
| 活かせる語学 | - |
| 勤務時間 | その他 |
| 福利厚生・休暇 |
仕事詳細
<Job Responsibilities>
With the specifications required by the customer as INPUT
Carry out specific design verification work using the following languages
**OUTPUT
Functional specifications (English)
Implementation specifications (English)
RTL (Verilog / SystemVerilog)
Verification strategy (English)
Verification item table (English)
Verification environment construction/verification scenario (System Verilog / SVA / UVM / C)
Verification environment manual (English)
Verification result report (English)
- Other tasks assigned by the manager
<Necessary Skill / Experience >
- Age: under 35
- Gender: Any
- More than 3 years experience as Engineer Leader in the semiconductor industry, having skills as below;
*Front-end design and verification of ASIC
*RTL design by Verilog HDL/VHDL
*Design and verification using a general-purpose bus AMBA(AXI/AHB/APB)
*Assertion-Based Verification
- Technician who can do tasks by himself/herself
<Preferable Skill / Experience>
- English skill : Business level(overseas business trip, meeting with overseas engineers)
- Technical skills as below
Design and verification of ASIC built-in CPU
Design and verification of high-speed interfaces such as PCI Express and USB
Random verification using SystemVerilog
Testbench building that applied verification methodology(UVM)
面接について
連絡先
Design & Verification Engineer Leder- Semiconductor (LSI)
RGFタレントソリューションズ株式会社
1440 〜 3080 USD
